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MCU， unpredictable

2026/3/11 18:05:17

The rise of artificial intelligence is changing the demand for microcontrollers (MCUs). The code generated by artificial intelligence and the growing demand for AI inference, coupled with the requirements for system security in network security standards such as the Network Resilience Act (CRA), are changing the way microcontrollers are applied in system design. The transition to more advanced 22 nanometer process technology has enabled new memory technologies such as MRAM to achieve higher performance at lower costs, thereby driving the entry of new MCU architectures into the market. All of these will be showcased at the Embedded World Exhibition held in Nuremberg, Germany this week.

1.Memory safety

SCI Semiconductor showcased the first chip of its ICENI secure 32-bit microcontroller, which is the first commercial device to adopt the CHERI (Functional Hardware Enhanced RISC Instructions) secure memory architecture.
ICENI devices combine the RISC-V RV32E instruction set with the CHERI hardware architecture, allowing for simple recompilation to leverage the security features embedded in the hardware, making legacy code and AI generated code more secure.
SCI Semiconductor CEO Haydn Povey told eeNews Europe: 'There seems to be a huge gap between exploiting vulnerabilities and understanding the root cause of the problem.'. "
He aims to leverage the booming development of artificial intelligence coding to ensure that the code generated by artificial intelligence runs safely on microcontrollers.
Due to our intention to use tools such as code reuse, CodeForge, and AI generated code, CHERI's development costs will be lower. It runs very safely, and you don't need to use Linux to implement thread isolation because it is already implemented at the hardware level, and energy consumption will also be reduced, "he said.
This memory security is achieved through the CHERI hardware enforcement capability model developed in collaboration with Microsoft and the University of Cambridge. This model replaces traditional pointers with unforgeable, bounded capabilities that include metadata specifying precise memory regions and their permissions. By ensuring that software components can only access the memory explicitly allocated to them, ICENI fundamentally achieves powerful spatial memory security, preventing the occurrence of whole class attacks before they occur.
Firstly, the workload of using memory security to eliminate vulnerabilities is minimal, as it only requires recompiling the code to use Instruction Set Architecture (ISA) extensions, "he said. But this kind of recompilation is already as lightweight as possible, whether using C, C++, or Rust, so you don't need to make any modifications to the code. In embedded development, everyone recompiles when making small changes, so this method is easily accepted. This can eliminate 70% of critical vulnerabilities. The next step is to implement code isolation by instrumentation the call stack, thereby enhancing the system's resilience. This will only have a less than 2% impact on the code. "
This modular design of code limits the "scope of impact" of any breakthrough attack. This method can effectively control faults or vulnerabilities, avoiding the complexity and performance loss caused by traditional microcontroller protection models, and does not require the use of larger, more power consuming microprocessors with memory management units.
The ICENI microcontroller is manufactured using the low-power 22FDX silicon on insulator (SOI) process produced by GlobalFoundries' factory in Dresden. This means we have European autonomy, which is crucial for our initial few companies and also allows us to produce in the United States. It makes a lot of sense, "Povey said.

2.Silicon Labs

At the same time, Silicon Labs is preparing to be acquired by Texas Instruments and plans to launch its Series 3 MCU series.

Daniel Cooley, Chief Technology Officer of Silicon Labs, told eeNews Europe: "The biggest difference of the Series 3 22nm platform is the digital content, where customer software runs in parallel with the wireless stack. "
This means that higher value applications require real-time operating systems and off chip flash to achieve in place execution (XIP), as customers have been plagued by cache misses. "
When we discussed intelligent caching with the customer, we found that it is not difficult for XIP, and removing the chip will not cause too much performance loss. This means they can have more scalable software. "
"We have software configuration files that can run and optimize the cache of embedded applications, as well as an authenticated XIP interface, which is critical for Internet connectivity."

In the field of artificial intelligence, reasoning is a big business. Any sensor data requires machine learning, and we will use multiple accelerators and have already distinguished proprietary technology from standards based technology, "he said. I see that ARM is advancing an attractive roadmap that includes U55 and U85 AI accelerators. As for how we package these technologies, we have not yet announced. "

One thing we see is that microcontrollers from 2018 to 2022 used proprietary accelerators, but from 2024 onwards, accelerators gradually shifted towards licensed accelerators

Security is also crucial for MCU. The next step is the Community Reinvestment Act (CRA), which is the real challenge. The impact will be enormous, "Kuli said.
Similarly, SCI's goal for ICENI microcontrollers is critical infrastructure, including grid digitization.
The first focus areas we see are aerospace and defense, but in more mainstream fields, we also see some companies playing a role in critical infrastructure, and they are the real leaders because their products have a shorter time to market, "said Bovi. Taking the smart grid as an example, the Ministry of Finance has signed a £ 18 billion funding agreement, but criticism has been that progress is too slow. However, the smart grid we are building needs to have 50 years of resilience and flexibility, so the trend towards interconnectivity is very evident
The software ecosystem is the key to promoting applications, and SCI collaborates with AWS FreeRTOS stack to separate all key aspects into different modules in order to narrow down the scope of attacks when vulnerabilities are discovered. After we completed this task, we automatically mitigated five newly identified CVE vulnerabilities, "Povey said.
He pointed out that the CHERI Alliance and its partners are developing software for microcontrollers, such as real-time operating systems (RTOS) and CRA, which came into effect this year.

3.How to maintain independence

Nordic Semiconductor and Silicon Labs in Norway are facing the same challenge of maintaining their independence as microcontroller suppliers. At the same time, the company acquired Memfault, a remote fault detection software developer, to expand its software ecosystem.
Nordic has now launched two smaller Bluetooth wireless microcontrollers (MCUs) aimed at providing solutions for more cost-effective, high-volume applications such as wearable devices. NRF54LS05A and nRF54LS05B provide developers with key features of the nRF54L series - powerful low-power Bluetooth (BLE) connectivity, low power consumption, and easy-to-use software - while optimizing for developing simple and cost-effective low-power Bluetooth terminal products. Nordic's low-power Bluetooth protocol stack can serve as a reference standard for simplifying the development of entry-level simple applications such as sensors, tags, beacons, remote controls, and PC peripherals.
We hope to provide developers with an easy and reliable starting point through nRF54LS05A and nRF54LS05B, "said Ø yvind Str ø m, Vice President of Short Range Wireless Business at Nordic Semiconductor. These two SoCs not only have the basic functions of our standard Bluetooth low-power SoC, but also combine our easy-to-use software ecosystem, which will help create a fair competitive environment for users who build streamlined, cost sensitive applications. "
These microcontrollers (MCUs) use a 128 MHz ARM Cortex M33 processor and low leakage RAM, enabling efficient and fast processing in compact, ultra-low power wireless designs. They integrate Nordic's fourth generation multi protocol Bluetooth Low Energy (BLE) radio module, basic security features, and are compatible with some SoC pins in the series for easy expansion.
Although both SoCs offer the same level of non-volatile memory (NVM) at 0.5 MB, the RAM capacity of nRF54LS05A has slightly increased to 64 KB, while the RAM capacity of nRF54LS05B has increased to 96 KB.
This series of products supports multiple wireless protocols, including Bluetooth LE, Matter, Thread, Zigbee, and the 2.4 GHz frequency band, and is currently ready for evaluation and development. It is expected to start mass production in the third quarter of 2026.

4.Artificial Intelligence Accelerator

At the same time, Texas Instruments has launched microcontrollers (MCUs) equipped with TinyEngine neural processing unit (NPU) hardware accelerators. The MSPM0G5187 and AM13Ex MCUs integrate TinyEngine NPU, which reduces latency and improves energy efficiency during edge processing.

Texas Instruments (TI) stated that the MSPM0G5187 is based on ARM Cortex-M0+MSPM0 MCU, and for embedded designers, its price per thousand chips is less than $1, representing a fundamental change. On chip TinyEngine can reduce the latency of each AI inference by up to 90 times and reduce the energy consumption of each AI inference by more than 120 times.
The MCU is supported by the new version of CCStudio Integrated Development Environment (IDE), which uses generative AI capabilities to enable engineers to accelerate code development, system configuration, and debugging using simple language and industry standard agents and models combined with TI data.

Amichai Ron, Senior Vice President of Embedded Processing and Digital Optical Processing Products at Texas Instruments (TI), stated that TI invented the Digital Signal Processor (NPU) nearly 50 years ago, laying the foundation for today's edge AI processing. Now, TI is leading the next stage of innovation by integrating TinyEngine NPU into our entire microcontroller product portfolio, including general-purpose and high-performance real-time MCUs. By implementing AI in our software, tools, devices, and ecosystem, we are making it easy and convenient for every customer and every application to use edge AI

Although most of the global attention is focused on AI acceleration and NPU in large SoCs, it has been proven that some more interesting and far-reaching AI applications can be implemented in small chips such as microcontrollers, "said Bob O'Donnell, President and Chief Analyst of TECHnalysis Research. Edge based AI acceleration applications can make consumer electronic devices smarter and industrial devices more efficient. In addition, if these chips can be combined with software development tools that utilize AI to build AI functions, the powerful capabilities of AI acceleration can be brought to a wider range of engineers and device designers.

5.Wearable artificial intelligence

Low power artificial intelligence microcontroller startup Environmental Scientific has partnered with Indian virtual reality company Dimension NXG to expand its business in the field of wearable sensors. Dimension has developed a women's safety wearable device called MAI using ambient's GPX-10 artificial intelligence microcontroller. The device features always on artificial intelligence capabilities and a battery life of up to two weeks.
The MAI wearable device uses the GPX10 AI microcontroller from Environmental Semiconductor.
The GPX-10 MCU adopts memory processing technology, with 10 MAC modules containing both digital and analog components to achieve low power consumption, and is equipped with an ARM M4 core.
MAI is a health companion designed specifically for women, with a built-in safety protection layer. It can track daily vital signs such as heart rate and blood oxygen saturation, and provide blood pressure analysis based on sensor configuration, converting daily signals into executable health information.
This wristband aims to safeguard women's health and safety through biological signal tracking and built-in artificial intelligence features, including fall detection. Safety is a common issue in the Southeast Asian market, and it is crucial to be able to detect attacks in real-time and trigger alerts, "said GP Singh, CEO of Environmental, to eeNews Europe. It also has built-in algorithms that can detect women's health status, ensure medical data is saved on the device, and have a battery life of up to two weeks. GPX10 serves as the main controller, equipped with ARM M4 processor, including 10 self-developed cores for controlling communication chips. "
MAI wearable devices will enter the field testing phase next week, distributing thousands of devices to pre order customers and test participants across India. Dimension NXG plans to expand its product scale to over 10000 units by the end of the year, provided that the product can obtain more medical grade certifications.

6.Low cost microcontroller

STMicroelectronics is pushing its microcontrollers (MCUs) into more fields by significantly reducing the unit price to $0.64. The target applications of the latest entry-level ARM M33 microcontroller STM32C5 include smart thermostats, electronic door locks, industrial smart sensors, robot actuators, wearable electronic devices, and computer peripherals.
The new design using 40nm technology achieves higher performance at 144MHz frequency, thereby improving sensing performance and control smoothness, and integrating more safety features. These features include resisting side channel attacks and on-chip encryption.
This series of products has been optimized for drivers to reduce memory size, with variants offering up to 1024 KB of flash memory and 256 KB of SRAM, as well as Ethernet, OctoSPI, and FDCAN interfaces.

The sizes of these devices range from 3mm x 3mm in UFQFPN20 package to 20mm x 20mm in LQFP144 package:

The STM32C5 enhances the precision, speed, and reliability of competitive price microcontrollers, fully unleashing the potential of these opportunities. It is built on STM32's 20-year technological heritage and is also part of our commitment to providing the widest, most scalable, and secure product portfolio, covering from entry-level devices to advanced microcontrollers that redefine the scope of embedded system applications, "said Patrick Aidoune, Vice President of STMicroelectronics Group and General Manager of General Motors and Automotive Microcontrollers Division.
ST's Nucleo evaluation board and Riverdi's display expansion board (equipped with TouchGFX development software for building entry-level graphical user interfaces) are ready to assist in development.

7.Robot

The acquisition of MIPS series microcontrollers and microprocessors by GlobalFoundries is a significant change for the market.
Nowadays, SCI's collaboration with Inova Semiconductors in Germany aims to create a reference platform for advanced humanoid robots and physical AI edge platforms. This platform is based on Inova's expertise in partition architecture in the automotive field, enabling mixed criticality computing, real-time control loops, and safe AI workloads. It is manufactured using the same 22FDX process as SCI's ICENI microcontroller.
Inova's APXpress high-speed interface will be used in conjunction with MIPS Atlas M8500 RISC-V high-performance MCU IP, MIPS Atlas S8200 RISC-V AI processor IP, and mixed signal to create a customized System on Chip (SoC) for robotic workloads.
MIPS CEO Sameer Wasson said, "We have partnered with Inova to create a physical AI reference platform that simplifies robot design, reduces bill of materials costs, and provides manufacturers with an open, standards based path to create a complete product line with low latency and functionally safe connectivity
Robotics technology is developing rapidly, and leaders will scale up quickly and cost efficiently. By combining INOVA's high-speed communication link with MIPS's open RISC-V computing and mixed signal technology, this scalable reference platform transforms' perception thinking action communication 'into physical artificial intelligence building modules, thereby reducing risks, lowering costs, and accelerating product launch speed. "
Advanced humanoid robots require safe, deterministic connections and scalable control backbones. We have provided robot manufacturers with a RISC-V-based regional architecture blueprint that reduces complexity and cost, helping humanoid and advanced robots transition faster from the prototype phase to mass production, "said Robert Isele, CEO of Inova. Creating a reference area architecture for advanced robots will make the development of humanoid robots and other robot forms simpler and faster
Users can experience the MIPS Atlas Explorer platform in advance, which is a simulation based software and hardware collaborative design platform. This platform enables software developers to access virtual representations of computing units and microcontrollers, thus starting to optimize visual language action models and prepare for the basic model of robot control reference architecture.

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